Why chips matter for India
Semiconductors are the base layer for everything from phones and 5G to missiles, drones and medical gear. India’s consumption was $52 bn in 2024-25 and is projected to $103.4 bn by 2030 (13% CAGR). Mobile/IT/industrial absorb ~70% today; automotive and industrial electronics are the next surge. For SSB: this is Atmanirbhar Bharat in its most strategic form — chips decide whether a system can be built, not just bought.
Imports of ICs, memory and amplifiers rose 2,000–4,800% FY16-24, with China supplying ~1/3. Every fab in India directly cuts that exposure.
India Semiconductor Mission — what an SSB aspirant must know
ISM (2021, MeitY) is the nodal agency under the Programme for Development of Semiconductors and Display (₹760 bn / ~$10 bn). Aim: move India into the global electronics value chain, cut import dependence, and create a trusted fab base.
- Fabs — wafer fabrication (up to 50% fiscal support)
- ATMP/OSAT — assembly, testing, marking & packaging (up to 50% capex)
- Compound/SiPh/Sensors/Discrete — including SiC, GaN, MEMS
- DLI — design-linked incentive: 50% design cost (cap ₹15 cr) + deployment incentive on sales; 24 design projects (₹9 bn) + 14 firms raised ₹6.5 bn VC.
Semicon 2.0 (15 July 2026) — ₹1.275 trillion ($13.23 bn): extends cover to equipment, speciality materials, chemicals, gases, precision parts, R&D and talent — not just the fab building. Think full stack: design → fab → display → packaging → tools.
The 13 projects — only these names matter for GD
As of 18 May 2026: 12 under ISM + 1 under SPECS (Sahasra Bhiwadi). Remember 4 anchors and you cover 80% questions.
Need one more name? SiCSem (Odisha) — India’s first commercial SiC fab for EVs/power. SEZ reform helped: 50 ha → 10 ha minimum, Tata Dholera notified 9 Apr 2026 as India’s first fab SEZ.
Ecosystem strengths India already has
- Design talent: ~7% world’s semiconductor GCCs, ~20% of global chip-design workforce sits in India; AMD’s largest design centre is in Bengaluru ($400m); NXP scaling.
- State stacking: Gujarat (Dholera/Sanand), Assam (Jagiroad), UP (Jewar), Odisha, Punjab all layer state incentives on top of central 50% support.
- Market pull: 2nd largest 5G smartphone market (13% global), plus AI, telecom, IoT, medical (MRI, wearables) driving demand.
What holds India back
- Fab complexity: 500–1,500 steps in cleanrooms; each fab needs flawless power, water, chemicals — costly.
- People gap: 220k professionals today, need +250–350k by 2027.
- Tech moat: Taiwan/Korea hold ~80% of foundries; ASML owns EUV; Nvidia/ARM lead design — access is gated.
- Environment & regulation: hazardous chemicals, high energy, IP/export controls add cost.
What India is doing — SSB can quote this
- Skilling: DLI + state policies (UP Semiconductor Policy 2024 — interest subsidy, SGST exemption 10 yrs) plus Tata/Micron skilling centres with IITs/NITs.
- R&D & IP: push indigenous SoCs for surveillance, drones, satcom, IoT; L&T’s $10 bn fab ambition as private-sector signal.
- Chip diplomacy: partnerships with US, Japan, Netherlands (ASML) — US-China decoupling is India’s window; focus on niche MEMS/sensors where entry cost is lower.
- Policy continuity: treat subsidy as milestone-linked, not grant — align feasibility to node slabs and IRR.
How to use this at SSB
Lecturette/GD hook: “India consumes $103 bn of chips by 2030 but imports a third of its ICs from one source. ISM 2.0’s 13 projects — including Dholera’s first fab with ASML — are India’s answer. The gap is people: 300k more engineers needed by 2027.” One market number + one mission number + one challenge number = complete answer.
Sources: India Briefing/Dezan Shira — India Semiconductor Sector July 2026; MeitY ISM data. Numbers rounded for briefing.